Article by Michael Chu, Nicholas Weaver, Kolja Sulimma, André DeHon, and John Wawrzynek, published in Proceedings of the International Symposium on Field-Programmable Gate Arrays for Custom Computing Machines (FCCM '98, April 15-17, 1998), 9 pages.
Abstract:Generators, parameterized code which produces a digital design, have long been a staple of the VLSI community. In recent years, several Field Programmable Gate Array (FPGA) design tools have adopted generators, as it is a convenient way to specify reusable designs in a familiar programming environment. We have built a generator framework in Java as a basis for programming reconfigurable devices and as a tool to be embedded in larger development systems. In addition to the conventional benefits of generators, this powerful framework allows for parial evaluation, simulation, specialization, and easy inclusion of other automatic services. In order to verify the utility of this system, we have implemented several applications using this framework and compared them with implementations using schematic capture and HDL synthesis. Our system runs significantly faster and produces comparable or superior results when mapped to a target FPGA.