BRASS Research Group


Current group projects

SCORE: Stream Computation Organized for Reconfigurable Execution
BRASS Object-Oriented Module-generators (BOOM)
The Garp Chip: a microprocessor w/ an integrated reconfigurable coprocessor
Automatic C Compilation to SW + Reconfigurable HW
Rapid Datapath-Oriented FPGA Mapping
Flexible API for Module-based Environmens

SUIF Passes

Procedure inlining (SUIF 1.1.2 &

Class projects directly related to BRASS

CS252 (Computer Architecture), Fall Term 1999
SCOREPix: MPEG Video Encoding On Reconfigurable Hardware

CS262 (Advanced Topics in Computer Systems), Fall Term 1998
Scheduling for Virtualized FPGA Hardware

CS270 (Combinatorial Algorithms and Data Structures), Fall 1997
On Detailed Routing for a Hierarchical Scalable Reconfigurable Array With Constrained Switching Capability

CS294-7 (Reconfigurable Computing), Spring Term 1997

CS252 (Computer Architecture), Fall Term 1996
IDEA as a Benchmark for Reconfigurable Computing
Case Study of Compression on a Gate Array + Risc Processor Architecture
Comparison of Reed Solomon Codec Implementations

CS252 (Computer Architecture), Spring Term 1996
Brute-force Keysearch (RC4, A5, DES, and CDMF) using FPGAs and Processors

CS252 (Computer Architecture), Fall Term 1995
MPEG decoding using RISC+FPGA

Other projects (class and otherwise)

IRAM Group and IRAM Class
T0 Vector Microprocessor

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